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Piledriver and Trinity

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http://fudzilla.com/home/item/25637-amd-re...d-with-new-name

 

Fusion brand dumped for Heterogeneous Systems Architecture (HSA).

Why? Wwwhhhyyyyyyyy!

 

Your average Joe isn't going to remember that.

 

Edit:

Though they may (I hope) have a good reason for the rebranding:

Of course, AMD also insists that the rebranding is more than just a marketing strategy to attract the attention of professional computing crowds. Rogers promises to reveal recent advances in the Heterogeneous Systems Architecture during AMD's Financial Analyst Day on Thursday, February 2, 2012 that is expected to demonstrate a clear improvement worthy of the platform's new name.

Edited by mark84

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http://fudzilla.com/home/item/25637-amd-re...d-with-new-name

 

Fusion brand dumped for Heterogeneous Systems Architecture (HSA).

Why? Wwwhhhyyyyyyyy!

 

Your average Joe isn't going to remember that.

 

Edit:

Though they may (I hope) have a good reason for the rebranding:

Of course, AMD also insists that the rebranding is more than just a marketing strategy to attract the attention of professional computing crowds. Rogers promises to reveal recent advances in the Heterogeneous Systems Architecture during AMD's Financial Analyst Day on Thursday, February 2, 2012 that is expected to demonstrate a clear improvement worthy of the platform's new name.

It's because Heterogeneous is an industry standard term. So industry people immediately know what it's about... just in the name.

 

I look forward to these 'advances'.

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I do think Fusion will remain the current consumer branding whilst the development/business side of Fusion is rebranded as Heterogeneous Systems Architecture.

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I do think Fusion will remain the current consumer branding whilst the development/business side of Fusion is rebranded as Heterogeneous Systems Architecture.

Yeah... but the media goes and calls it dumped... instead of renamed.

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http://www.xbitlabs.com/news/cpu/display/2...hitectures.html

 

AMD Quietly Adopting "Tick-Tock" Model for Micro-Architectures.

 

AMD to Use Slightly Different Micro-Architectures for APUs and CPUs

[01/25/2012 08:37 PM]

by Anton Shilov

 

Intel Corp.'s so-called "tick-tock" model of transitioning to new manufacturing processes and micro-architectures has proved to be very efficient in making Intel the maker of the highest-performance microprocessors. Apparently, its smaller rival Advanced Micro Devices is also plotting something similar, but a bit differently.

 

As it appears from AMD's documents observed by an X-bit labs reader (in the comments for this news-story), starting from Piledriver micro-architecture and going forward, AMD's Fusion accelerated processing units (chips that integrate both x86 and stream processing cores) will feature "reduced", or "early" micro-architectural feature-set, whereas central processing units (CPUs) based on new designs will feature "full" or "late" feature-set. As a result, x86 performance of the former will be lower than x86 performance of the latter.

 

AMD wants APUs to be released earlier than fully-fledged CPUs since they are aimed at broader segment of the market. Therefore, x86 cores of Fusion chips will sport "reduced" next-generation micro-architecture (and will fully support previous-gen features and capabilities) in order to cut their development time and reduce their die size. CPUs will come to market several months after APUs and will feature more advanced x86 cores that will support more new instructions and therefore will offer better x86 performance.

 

For example, only fully-fledged "late" Piledriver inside Viperfish (code-name of next-gen server/desktop die design, the successor of Orochi that powers FX and Opteron chips) will be able to execute numerous new instructions as well as will receive instructions per clock (IPC) increase. Even though reduced "early" Piledriver inside code-named Trinity APUs will be more advanced than the original Bulldozer, the x86 cores are projected to be slightly less efficient than those of the full Piledriver.

 

The "tick-tock"-like approach is expected to allow AMD to reduce time-to-market of its new products and ensure that innovations do not negatively affect yields. On the other hand, it will create difficulties for software makers who will have to take into account that x86 cores within one generation of APUs and CPUs are slightly different. In addition, it should be noted that AMD's "tick-tock" has nothing to do with transitions to newer process technologies and is almost completely about micro-architectures.

So there ya go. Perhaps Trinity won't give us the full Piledriver story until 'Viperfish' ( <-- not a shabby name imo )

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http://www.xbitlabs.com/news/cpu/display/2...hitectures.html

 

AMD Quietly Adopting "Tick-Tock" Model for Micro-Architectures.

 

AMD to Use Slightly Different Micro-Architectures for APUs and CPUs

[01/25/2012 08:37 PM]

by Anton Shilov

 

Intel Corp.'s so-called "tick-tock" model of transitioning to new manufacturing processes and micro-architectures has proved to be very efficient in making Intel the maker of the highest-performance microprocessors. Apparently, its smaller rival Advanced Micro Devices is also plotting something similar, but a bit differently.

 

As it appears from AMD's documents observed by an X-bit labs reader (in the comments for this news-story), starting from Piledriver micro-architecture and going forward, AMD's Fusion accelerated processing units (chips that integrate both x86 and stream processing cores) will feature "reduced", or "early" micro-architectural feature-set, whereas central processing units (CPUs) based on new designs will feature "full" or "late" feature-set. As a result, x86 performance of the former will be lower than x86 performance of the latter.

 

AMD wants APUs to be released earlier than fully-fledged CPUs since they are aimed at broader segment of the market. Therefore, x86 cores of Fusion chips will sport "reduced" next-generation micro-architecture (and will fully support previous-gen features and capabilities) in order to cut their development time and reduce their die size. CPUs will come to market several months after APUs and will feature more advanced x86 cores that will support more new instructions and therefore will offer better x86 performance.

 

For example, only fully-fledged "late" Piledriver inside Viperfish (code-name of next-gen server/desktop die design, the successor of Orochi that powers FX and Opteron chips) will be able to execute numerous new instructions as well as will receive instructions per clock (IPC) increase. Even though reduced "early" Piledriver inside code-named Trinity APUs will be more advanced than the original Bulldozer, the x86 cores are projected to be slightly less efficient than those of the full Piledriver.

 

The "tick-tock"-like approach is expected to allow AMD to reduce time-to-market of its new products and ensure that innovations do not negatively affect yields. On the other hand, it will create difficulties for software makers who will have to take into account that x86 cores within one generation of APUs and CPUs are slightly different. In addition, it should be noted that AMD's "tick-tock" has nothing to do with transitions to newer process technologies and is almost completely about micro-architectures.

So there ya go. Perhaps Trinity won't give us the full Piledriver story until 'Viperfish' ( <-- not a shabby name imo )

Decent plan there IMO.

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Sounds good and if the reported 25% increase in ipc in trinity is true and 'viperfish' is better, maybe there is some hope on the horizon for a decent performer from AMD. Mind you I get the feeling that this is sounding a bit lkike a broken record "if x is better then y then v might be true"......

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http://www.xbitlabs.com/news/cpu/display/2...hitectures.html

 

AMD Quietly Adopting "Tick-Tock" Model for Micro-Architectures.

 

AMD to Use Slightly Different Micro-Architectures for APUs and CPUs

[01/25/2012 08:37 PM]

by Anton Shilov

 

Intel Corp.'s so-called "tick-tock" model of transitioning to new manufacturing processes and micro-architectures has proved to be very efficient in making Intel the maker of the highest-performance microprocessors. Apparently, its smaller rival Advanced Micro Devices is also plotting something similar, but a bit differently.

 

As it appears from AMD's documents observed by an X-bit labs reader (in the comments for this news-story), starting from Piledriver micro-architecture and going forward, AMD's Fusion accelerated processing units (chips that integrate both x86 and stream processing cores) will feature "reduced", or "early" micro-architectural feature-set, whereas central processing units (CPUs) based on new designs will feature "full" or "late" feature-set. As a result, x86 performance of the former will be lower than x86 performance of the latter.

 

AMD wants APUs to be released earlier than fully-fledged CPUs since they are aimed at broader segment of the market. Therefore, x86 cores of Fusion chips will sport "reduced" next-generation micro-architecture (and will fully support previous-gen features and capabilities) in order to cut their development time and reduce their die size. CPUs will come to market several months after APUs and will feature more advanced x86 cores that will support more new instructions and therefore will offer better x86 performance.

 

For example, only fully-fledged "late" Piledriver inside Viperfish (code-name of next-gen server/desktop die design, the successor of Orochi that powers FX and Opteron chips) will be able to execute numerous new instructions as well as will receive instructions per clock (IPC) increase. Even though reduced "early" Piledriver inside code-named Trinity APUs will be more advanced than the original Bulldozer, the x86 cores are projected to be slightly less efficient than those of the full Piledriver.

 

The "tick-tock"-like approach is expected to allow AMD to reduce time-to-market of its new products and ensure that innovations do not negatively affect yields. On the other hand, it will create difficulties for software makers who will have to take into account that x86 cores within one generation of APUs and CPUs are slightly different. In addition, it should be noted that AMD's "tick-tock" has nothing to do with transitions to newer process technologies and is almost completely about micro-architectures.

So there ya go. Perhaps Trinity won't give us the full Piledriver story until 'Viperfish' ( <-- not a shabby name imo )

 

From that article... there are only minor changes architecturally that appear in line with previous gen Llano. Which itself was cut down Stars. This points more to the platform they are trying to achieve with Llano.... not any kind of release strategy.

 

I have little faith xbitlabs. Then they go and write an article on a readers observations. Now even less so.

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This is quite similar to what AMD did for the 5800 series to 6900 series. There were some features similar to the 7900 series but majority of it was the previous gen. So from that, I'm guessing they're using a Bulldozer architecture but probably tacked on features that's possible on the next gen.

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IBM Quietly Starts to Make Chips for AMD

 

Advanced Micro Devices has disclosed at an analyst event that it had begun manufacturing of its chips at IBM's facilities. The partnership is believed to ensure AMD's ability to supply its next-generation A-series Fusion chips code-named "Trinity" to PC makers and be in position to compete against Intel Corp.'s Core i-series future products.

 

"We win together, we have partnership in good times and in difficult times. What we are seeing is a focus on execution running test chips through the [production] line to gather the data [...] with partners from IBM and Globalfoundries," said Rory Read, chief executive officer of AMD.

 

Officially, AMD produces its central processing unit (CPUs) exclusively at Globalfoundries (GF), a contract manufacturer of semiconductors controlled by an Abu Dhabi-based financial organization called ATIC and AMD. The chip designer complained throughout 2011 about low production yield at Globalfoundries and even signed an agreement under which it paid GF on per working chips basis, not on per wafer basis.

 

Production of chips at IBM facilities means a number of things, the most important of which is increased ability to compete in terms of volume with Intel. While Intel runs more than five leading-edge semiconductor making fabs across the world and those facilities by definition can produce times more chips than IBM and GF combined, it is clear that added manufacturing capacity will be good for AMD.

 

For a number of times AMD noted about better availability of Trinity APU compared without elaboration. Apparently, better availability is conditioned by adding a new manufacturing facility as well as improved design of the chip itself.

 

 

AMD: Leading Graphics Performance Is Critical for Us.

 

AMD will launch its next-gen FX-series chip code-named Vishera with Piledriver x86 cores (that will increase instructions per clock count and thus will be faster than existing ones) sometimes in the second half of the year, some project November-December timeframe. But unfortunately for AMD, it will have to sell those chips throughout the whole 2013 and compete against Intel's code-named Ivy Bridge-E and Haswell offerings as next year the company does not plan to refresh its high-end lineup at all. Similar situation occurs with AMD's server lineup: in 2013 the company currently has no plans to introduce new server processors.

 

Without tangible improvements of "discrete" central processing units, AMD has to count only on performance advantages brought by its graphics processors whether in standalone or integrated variations.

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Where are AMD relative to Intel's process capabilities? I've got a vague feeling they're very close, possibly closer than anyone and this could be a similarly very smart move by AMD.

 

The only hold back being I don't know how familiar IBM are with third-party designs, and that AMD will now have another process to tape out on.

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Where are AMD relative to Intel's process capabilities? I've got a vague feeling they're very close, possibly closer than anyone and this could be a similarly very smart move by AMD.

 

The only hold back being I don't know how familiar IBM are with third-party designs, and that AMD will now have another process to tape out on.

IBM and GF use the same process I believe, they both co-designed it.

And i'm sure any gap there is between GF and Intel will rapidly shrink if they start making console CPU's on the same process's.

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Where are AMD relative to Intel's process capabilities? I've got a vague feeling they're very close, possibly closer than anyone and this could be a similarly very smart move by AMD.

 

The only hold back being I don't know how familiar IBM are with third-party designs, and that AMD will now have another process to tape out on.

IBM and GF use the same process I believe, they both co-designed it.

And i'm sure any gap there is between GF and Intel will rapidly shrink if they start making console CPU's on the same process's.

 

Hitman is correct. IBM is at the forefront of the semi-conductor manufacturing alliance... along with a lot of big names in the industry.

 

SOI is the go. And AMD have a firm partnership with them. I think this is the best move AMD could make at this stage... to utilise the friends it made when times were good, now in the times that aren't.

 

Trinity has to come out swinging. If there is not a hitch with it... it's just going to land AMD a tonne of success. Everything has to go smoothly.

 

IBM Quietly Starts to Make Chips for AMD

 

Advanced Micro Devices has disclosed at an analyst event that it had begun manufacturing of its chips at IBM's facilities. The partnership is believed to ensure AMD's ability to supply its next-generation A-series Fusion chips code-named "Trinity" to PC makers and be in position to compete against Intel Corp.'s Core i-series future products.

 

"We win together, we have partnership in good times and in difficult times. What we are seeing is a focus on execution running test chips through the [production] line to gather the data [...] with partners from IBM and Globalfoundries," said Rory Read, chief executive officer of AMD.

 

Officially, AMD produces its central processing unit (CPUs) exclusively at Globalfoundries (GF), a contract manufacturer of semiconductors controlled by an Abu Dhabi-based financial organization called ATIC and AMD. The chip designer complained throughout 2011 about low production yield at Globalfoundries and even signed an agreement under which it paid GF on per working chips basis, not on per wafer basis.

 

Production of chips at IBM facilities means a number of things, the most important of which is increased ability to compete in terms of volume with Intel. While Intel runs more than five leading-edge semiconductor making fabs across the world and those facilities by definition can produce times more chips than IBM and GF combined, it is clear that added manufacturing capacity will be good for AMD.

 

For a number of times AMD noted about better availability of Trinity APU compared without elaboration. Apparently, better availability is conditioned by adding a new manufacturing facility as well as improved design of the chip itself.

My fears have been realised. Those dirty money grabbing sand dwellers cheated them out of their fabs. They just bought more and more and more fabs till AMD had no say in the control of GF. Now Doug Grouse has been ousted and some new guy without much manufacturing experience is in. Though he probably got the job because he's Arab. At any rate AMD don't have a board member in GF any more.

 

But AMD struggled to keep operating their own fabs. I just hope IBM has the production capability to satisfy AMD.

 

AMD: Leading Graphics Performance Is Critical for Us.

 

AMD will launch its next-gen FX-series chip code-named Vishera with Piledriver x86 cores (that will increase instructions per clock count and thus will be faster than existing ones) sometimes in the second half of the year, some project November-December timeframe. But unfortunately for AMD, it will have to sell those chips throughout the whole 2013 and compete against Intel's code-named Ivy Bridge-E and Haswell offerings as next year the company does not plan to refresh its high-end lineup at all. Similar situation occurs with AMD's server lineup: in 2013 the company currently has no plans to introduce new server processors.

 

Without tangible improvements of "discrete" central processing units, AMD has to count only on performance advantages brought by its graphics processors whether in standalone or integrated variations.

What a load bollocks. Xbitlabs is the worst for this kind of spin. AMD already have the improvement schedule.

 

But to Xbitlabs it's; "Oh AMD didn't talk about it so it mustn't be happening any more".

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IBM and GF use the same process I believe, they both co-designed it.

And i'm sure any gap there is between GF and Intel will rapidly shrink if they start making console CPU's on the same process's.

I definitely need a refresh on the aliiances in CPU lithography (thought the alliance was more recent). I'd still suggest that they're not quite identical given that GloFO's implementation of the tech was more borky than IBM's, hence the use of IBM. An alliance but not complete sharing?

 

Hitman is correct. IBM is at the forefront of the semi-conductor manufacturing alliance... along with a lot of big names in the industry.

 

SOI is the go. And AMD have a firm partnership with them. I think this is the best move AMD could make at this stage... to utilise the friends it made when times were good, now in the times that aren't.

 

Trinity has to come out swinging. If there is not a hitch with it... it's just going to land AMD a tonne of success. Everything has to go smoothly.

Two genuine (and possibly related) questions - why do you feel SOI is the in GloF0 or IBM's future as I understood it to up in the air a bit past 28nm with FD-SOI possibly being abandoned, and in any case probably not being usable past 20nm. Secondly what makes it special; for example Intel's high-K process seems to be able to take, but also need less voltage, the processes overall seem comparable in terms of efficacy?

 

My fears have been realised. Those dirty money grabbing sand dwellers cheated them out of their fabs. They just bought more and more and more fabs till AMD had no say in the control of GF. Now Doug Grouse has been ousted and some new guy without much manufacturing experience is in. Though he probably got the job because he's Arab. At any rate AMD don't have a board member in GF any more.

Yeah.. I feared the same buying out, it was clearly Dirk Meyer's plan all along. But calling ATIC Sand-dwellers, or cheats (they purchased it at a fair price) is a tad harsh. Edited by philo-sofa

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AMD Appears to be Advancing ARM plans:

 

At the analyst day AMD showed off a slide, stating:

 

Posted Image

 

Posted Image

 

The slide is hardly subtle. ISA in this context stands of instruction set archictecture. So AMD is saying that it is considering non-x86 instruction sets for make SoC (system-on-a-chip) processors for datacenters, SoCs that can use "third party IP [cores]."

 

Given that this explicitly describes the ARM chipmaking approach, it seems extremly likely that AMD is considering ARM server chips similar to those being produced by ARM Holdings subsidiary Calxeda for Hewlett-Packard Comp. (HPQ) (the world's largest sever maker).

 

According to Anandtech's Anand Lal Shimpi, AMD even went as far as to name-drop ARM several times during the presentations, although stopping short of making a specific commitment to ARM.

 

An AMD defection (at least in part) to ARM would not exactly be surprising, given all the momentum ARM has, and the financial burden it would take off AMD's chip-developing units. But it would be a major blow to Intel, who would be left in the lonely position of being the lone proponent of x86, pitted against a unified alliance of virtually every other large chipmaker in the traditional and mobile personal computer space.

(source)

Edited by philo-sofa

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AMD Denies Building Chips at IBM's Factories

 

Advanced Micro Devices denied on Tuesday that IBM had started to make chips on contract basis for the company. AMD said that IBM only provided consulting services to Globalfoundries, contract maker of AMD's microprocessors, so that to enable it to boost yields of chips produced using 32nm silicon-on-insulator process technology.

 

"IBM has given some consulting support to GF, as far as I know they are not producing chips for us," a spokesperson for AMD told X-bit labs.

 

Since IBM, Globalfoundries, Samsung Electronics and STMicroelectronics are jointly develop various semiconductor process technologies, they usually unify manufacturing processes and can help each other to build chips if needed. For example, Globalfoundries' fab 8 in Saratoga, New York, and IBM's facility in East Fishkill, New York, at present can produce the same chips. Nonetheless, this is not a case when it comes to IBM and AMD's central processing units and accelerated processing units as they are exclusively made at Globalfoundries.

 

During an event for financial analysts last week, AMD's chief executive Rory Read named IBM as one of AMD's manufacturing partners that helps to solve issues with supply of the company's latest chips, which implied that AMD had quietly added a manufacturing partner.

 

"We win together and we have a partnership [...] in difficult times and in good times. What we are seeing is the focus on execution, running the test chips through the line, the gathering of data, [...] working with partners from IBM and GlobalFoundries. We're seeing real focus day in and day out on execution improvement. Because of the work we're doing at the partnership level, we're getting the right kind of uptick from their side of the organization as well," said Mr. Read.

 

Back in 2011 Advanced Micro Devices ran into supply problems with its latest chips, including those made using 32nm SOI process technology - Bulldozer, Llano, etc. The firm had to change its supply agreement with Globalfoundries and worked hard to boost production yields of its APUs and CPUs. The major issues are believed to be solved by now.

 

Engineers Show Way to Improve Performance of AMD, Intel Hybrid Chips by 20%.

 

Researchers from North Carolina State University have developed a new technique that allows to improve performance of AMD Fusion or Intel Sandy Bridge hybrid chips by an average of more than 20%. The engineers propose to take advantage of unique features of x86 microprocessors, such as data pre-fetching or large caches, to speed up execution of highly-parallel tasks on graphics processing units.

 

“Chip manufacturers are now creating processors that have a ‘fused architecture,’ meaning that they include CPUs and GPUs on a single chip. This approach decreases manufacturing costs and makes computers more energy efficient. However, the CPU cores and GPU cores still work almost exclusively on separate functions. They rarely collaborate to execute any given program, so they aren’t as efficient as they could be. That’s the issue we’re trying to resolve,” said Dr. Huiyang Zhou, an associate professor of electrical and computer engineering who co-authored a paper on the research.

 

Central processing units (CPUs) have less computational power than graphics processing units (GPUs) – but are better able to perform more complex tasks and have a number of special-purpose units that are not present on graphics processors.

 

“Our approach is to allow the GPU cores to execute computational functions, and have CPU cores pre-fetch the data the GPUs will need from off-chip main memory. This is more efficient because it allows CPUs and GPUs to do what they are good at. GPUs are good at performing computations. CPUs are good at making decisions and flexible data retrieval,” said Mr. Zhou

 

In other words, CPUs and GPUs fetch data from off-chip main memory at approximately the same speed, but GPUs can execute the functions that use that data more quickly. So, if a CPU determines what data a GPU will need in advance, and fetches it from the main memory, that allows the GPU to focus on executing the functions themselves – and the overall process takes less time.

 

In the proposed CPU-assisted GPGPU, after the CPU launches a GPU program, it executes a pre-execution program, which is generated automatically from the GPU kernel using the proposed compiler algorithms and contains memory access instructions of the GPU kernel for multiple threadblocks. The CPU pre-execution program runs ahead of GPU threads because (1) the CPU pre-execution thread only contains memory fetch instructions from GPU kernels and not floating-point computations, and (2) the CPU runs at higher frequencies and exploits higher degrees of instruction-level parallelism than GPU scalar cores. The researchers also leverage the prefetcher at the L2-cache on the CPU side to increase the memory traffic from CPU. As a result, the memory accesses of GPU threads hit in the L3 cache and their latency can be drastically reduced. Since the pre-execution is directly controlled by user-level applications, it enjoys both high accuracy and flexibility. Engineers' experiments on a set of benchmarks show that our proposed preexecution improves the performance by up to 113% and 21.4% on average.

 

The paper, “CPU-Assisted GPGPU on Fused CPU-GPU Architectures”, will be presented in late February at the 18th International Symposium on High Performance Computer Architecture, in New Orleans. The paper was co-authored by NC State students Yi Yang and Ping Xiang, and by Mike Mantor of Advanced Micro Devices. The research was funded by the National Science Foundation and AMD.

^that right there is the proper start of Fusion/HSA. Excitement.

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you know I was just saying today that "AMD probably wont be competitive till they can utilise both their cpu and gpu in their hsa chips" so between 23% and 113% improvement on trinity would certainly make it more competitive with sandybridge considering that the gpu will be doing so much of the work in this proposed system

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http://www.techpowerup.com/159870/AMD-Outl...is-on-APUs.html - one of the slides here seems to imply that we may start to see this kind of stuff as early as next year - "support for HSA enabled programs".

 

[speculation]

This would make a lot of sense, considering that they have bailed on the solely x86 cored CPU other than just not being able to compete they may have strong indicators that if they just shovel the resources into HSA then it will start paying off next year and a great deal more then trying to struggle on with sole x86 based processors.

 

So glimpse of hope?

[/speculation]

Edited by UberPenguin

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AMD Appears to be Advancing ARM plans:

 

At the analyst day AMD showed off a slide, stating:

 

Posted Image

 

Posted Image

 

The slide is hardly subtle. ISA in this context stands of instruction set archictecture. So AMD is saying that it is considering non-x86 instruction sets for make SoC (system-on-a-chip) processors for datacenters, SoCs that can use "third party IP [cores]."

 

Given that this explicitly describes the ARM chipmaking approach, it seems extremly likely that AMD is considering ARM server chips similar to those being produced by ARM Holdings subsidiary Calxeda for Hewlett-Packard Comp. (HPQ) (the world's largest sever maker).

 

According to Anandtech's Anand Lal Shimpi, AMD even went as far as to name-drop ARM several times during the presentations, although stopping short of making a specific commitment to ARM.

 

An AMD defection (at least in part) to ARM would not exactly be surprising, given all the momentum ARM has, and the financial burden it would take off AMD's chip-developing units. But it would be a major blow to Intel, who would be left in the lonely position of being the lone proponent of x86, pitted against a unified alliance of virtually every other large chipmaker in the traditional and mobile personal computer space.

(source)

 

Is IP standing for Intellectual Property? Or is it Instruction Processes/Processors?

 

It would make sense for AMD to try and tack on a GPU for ARM SoC sold. Which is millions upon millions.

 

But I don't think AMD is giving up what they know... which is X86. Plus AMD have the know-how to make their own RISC/SoC which they used to make for printers and other devices. Small power efficient all purpose processors.

 

The question is it worth AMD spending money to make an ARM beater? No. Too much time and effort. Even though I believe the fundamentals for ARM's SoC's are quite old in origin... and it's a design that's built to scale from small and power efficient... to big and bulky. Which is why I think the way AMD is going with Bulldozer makes it far more attractive for servers going forward. If AMD can make heaps of money with APU's and win more and more designs. Then maybe they can make their own ARM beater for phones and the like.

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I assumed Intellectual property. The article isn't about building an 'ARM beater' quite. Other than using ARM's designs they'll also work with a given company to produce chips using the ARM instruction set. Much like Qualcomm - whilst in some ways their current Snapdragons are the equivalent of the A9 it's also it's brethren, and benefits ARM as much as Qualcomm. Presumably AMD could use their experience to make a Coretex A15 derivaative for the server market. Given Bulldozer's rather lacklustre performance per watt that would make sense.

 

Definitely they won't give up on x86, but diversifying makes sense.

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I assumed Intellectual property. The article isn't about building an 'ARM beater' quite. Other than using ARM's designs they'll also work with a given company to produce chips using the ARM instruction set. Much like Qualcomm - whilst in some ways their current Snapdragons are the equivalent of the A9 it's also it's brethren, and benefits ARM as much as Qualcomm. Presumably AMD could use their experience to make a Coretex A15 derivaative for the server market. Given Bulldozer's rather lacklustre performance per watt that would make sense.

 

Definitely they won't give up on x86, but diversifying makes sense.

Bulldozer is actually really attractive in the server space. And probably the reason why it's running out the door at AMD and journo's can't understand why - I think it was a techpowerup link that nobody813 posted in my thread.

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Bulldozer is actually really attractive in the server space. And probably the reason why it's running out the door at AMD and journo's can't understand why - I think it was a techpowerup link that nobody813 posted in my thread.

yer if they can get a revision out soon to improve performance a little while dropping power consumption i can see it becoming much more popular in the server space

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